MCASemester 12024-25Computer Organization ArchitectureBMC105

Computer Organization Architecture (BMC105) - AKTU Question Paper 2024-25

MCA · Semester 1 · Free PDF Download

This is the official AKTU Computer Organization Architecture Previous Year Question Paper for MCA Semester 1, academic session 2024-25. Published by Dr. A.P.J. Abdul Kalam Technical University (AKTU/UPTU), Lucknow. Free PDF download — no login required.

Course:MCA

Semester:Semester 1

Session:2024-25

University:AKTU / UPTU

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Questions Asked in 2024-25

Computer Organization Architecture (BMC105) — complete question paper · 70 marks · 3 Hours

Section AAttempt all questions in brief. 2 x 07 = 14

a
Explain functional units of a digital computer and their inter connections in brief
b
Differentiate Computer architect ure and Computer organization. 1 K 3
c
Look ahead carry adders are faster than Ripple Carry adders. Why?
d
When Bus arbitration is required?
e
Why is wait-for-memory-function-completed (WMFC) steps needed when reading from or writing to memory
f
W r i t e ( - 8 )10 and (+8)10 in twos complement form in 5-bit system
g
Define interrupt. How is it handled?

Section BAttempt any three of the following: 07 x 3 = 21

a
Illustrate different addressi ng modes with suitable examples
b
Explain the Booth’s multiplication method and apply this met hod to multiply decimal numbers (-9) 10 and (-13) 10. Also sketch hardware diagram and flowchart for Booth’s multiplication method
c
Represent (128.25) 10 in IEEE 754 Standard with Single precision
d
How the execution of a complet e instruction takes place in Single-bus organization explain in detail
e
Discuss the modes of trans fer & explain the following (i) Programmed I/O (ii) Interrupt initiated I/O

Section CAttempt any one part of the following: 07 x 1 = 07

a
Illustrate various methods of Bus arbitration with their adv antages and disadvantages
b
Produce a program to evaluate the arithmetic statement i. Using general register computer with 3-address instruction ii. Using general register computer with 2-address instruction Using general register computer with 1-address instruction
a
Divide 8/3 by Restoring division method
b
Draw and explain the flow cha rt for floating point multiplication
a
Explain arithmetic pipeline a nd instruction pipeline with su itable diagram
b
Write down the differences bet ween RISC and CISC processor. 3 K 3
a
A virtual memory system has an address space of 8k words, a memory space of 4k words and page and block/frame sizes of 1k words. T he following page reference changes occur during time interval. Determine the four pages that are resident in main memory after each
b
Differentiate 2D and 2.5 D memory organization along with ne at diagram
a
Describe asynchronous data transfer. What are the methods th rough which it can be achieved? Explain strobe control and Handshaking
b
Outline the block diagram of DMA controller. Illustrate, why are the read and write control lines in a DMA controller bidirectional?

Question text is extracted from the official AKTU question paper PDF above. Hindi translations are omitted — every question is printed in English in the original paper. Last verified: 2026-08-23.

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