B.TechSemester 72024-25Vlsi DesignKEC072
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Vlsi Design (KEC072) - AKTU Question Paper 2024-25

B.Tech · Semester 7 · Free PDF Download

This is the official AKTU Vlsi Design Previous Year Question Paper for B.Tech Semester 7, academic session 2024-25. Published by Dr. A.P.J. Abdul Kalam Technical University (AKTU/UPTU), Lucknow. Free PDF download — no login required.

Course:B.Tech
Semester:Semester 7
Session:2024-25
University:AKTU / UPTU

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Questions Asked in 2024-25

Vlsi Design (KEC072) — extracted question text · 100 marks · 3 Hours

Section AAttempt all questions in brief. 2 x 1 0 = 2 0
  • b
    Explain the importance of critical path analysis in VLSI design
  • c
    What is skin effect?
  • d
    Compare the transient response of a lumped and distributed RC model
  • e
    What is charge sharing in dynamic CMOS circuits?
  • f
    Explain the cascading of dynamic gates
  • g
    Differentiate between DRAM and SRAM
  • h
    List the types of non-volatile memories. 4 K1 i. Explain controllability and observability in testing. 5 K2 j. Define fault in the context of digital circuits
Section BAttempt any three of the following: 10 x 3 = 20
  • a
    Illustrate the VLSI design hierarchy and describe the layers of abstraction with examples
  • b
    Analyze the effects of resistance, capacitance, and inductance on interconnect performance in the distributed RC model
  • c
    Explain the noise considerations in dynamic CMOS design and the ir impact on performance
  • d
    Define DRAM and SRAM and describe their basic operation principles
  • e
    Explain ad-hoc technique for testability in a combinational circuit
Section CAttempt any one part of the following: 10 x 1 = 10
  • a
    Analyze the impact of CMOS propagation delay on circuit perform ance, incorporating the concept of sheet resistance
  • b
    Define the critical path in VLSI design and explain its significance in timing analysis
  • a
    Derive the RC delay model for a given interconnect circuit and calculate its transient response
  • b
    List and explain the parameters affecting interconnects in VLSI circuits
  • a
    Analyze the problems associated with single-phase clocking in d ynamic CMOS circuits
  • b
    Describe the steady-state behavior of dynamic CMOS gate circuits
  • a
    Explain the differences between volatile and non-volatile memories with examples
  • b
    Analyze the power consumption in CMOS circuits and the impact of voltage scaling on power efficiency
  • a
    Define common faults in digital circuits and their impact on circuit behavior
  • b
    Analyze the functional modeling of faults at the logic and register levels

Question text is extracted from the official AKTU question paper PDF above. Check the original PDF for equations, diagrams and complete wording. Extracted: 2026-08-23.

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