B.TechSemester 42025-26Digital ElectronicsBOE410

Digital Electronics (BOE410) - AKTU Question Paper 2025-26

B.Tech · Semester 4 · Free PDF Download

This is the official AKTU Digital Electronics Previous Year Question Paper for B.Tech Semester 4, academic session 2025-26. Published by Dr. A.P.J. Abdul Kalam Technical University (AKTU/UPTU), Lucknow. Free PDF download — no login required.

Course:B.Tech

Semester:Semester 4

Session:2025-26

University:AKTU / UPTU

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Questions Asked in 2025-26

Digital Electronics (BOE410) — complete question paper · 70 marks · 3 Hours

Section AAttempt all questions in brief. 02 x 7 = 14

a
Perform following subtraction using 2’s complement method
b
Determine the value of x in the expression, If (56.1A)16 = (x)8
c
What is difference between combinational and sequential circuits
d
Obtain the excitation table of a JK flip flop
e
A flip-flop has 5 ns delay from the time the clock edge occurs to the time the output is complemented. What is the maximum delay in a 10-bit binary ripple counter that uses these flip-flops? What is the maximum frequency the counter can operate reliably?
f
What is the role of state reduction in sequential circuit design?
g
Compare static RAM and dynamic RAM

Section BAttempt any three of the following: 07 x 3 = 21

a
Simplify the following Boolean function using K-map and also draw the simplified logic circuit using basic logic gates. (SEM. IV) THEORY EXAMINATION 2025-26 DIGITAL ELECTRONICS
b
Implement a full adder by using 8:1 multiplexer
c
Define bi-directional shift register. Draw and explain 3 bit bi-directional shift register using D flip-flop
d
Design a primitive state diagram and state table for a circuit with two asynchronous inputs (X and Y) and one output Z. This circuit is to be designed so that if any change takes place on X and Y, Z is to change states. Assume initially that the two inputs never change simultaneously
e
Explain briefly the operation of TTL NOR gate

Section CAttempt any one part of the following: 07 x 1 = 07

a
Minimize the following using Quine-Mc Cluskey Method
b
What is Gray Code? Convert (10010)₂ to Gray Code and explain its significance
a
Explain the look ahead carry generator with neat diagram
b
Design a full subtractor using NOR gates only. (SEM. IV) THEORY EXAMINATION 2025-26 DIGITAL ELECTRONICS
a
Discuss the Race around condition of JK flip flop. How JK flip-flop can be used as T flip-flop, Explain the design procedure
b
Discuss Mealy and Moore FSM. What do you mean by excitation table?
a
Discuss hazards in asynchronous circuits. How can race conditions be avoided?
b
Design a sequential circuit with two flip flops A & B and one input x. when x = 0, the state of the circuit remains the same and when x = 1 the circuit passes through the state transitions from 00 to 01 to 11 to 10 back to 00 and repeat
a
With the help of neat diagrams explain working of : (i) CMOS NAND gate (ii) CMOS NOR gate
b
Describe the difference between PAL & PLA using neat diagram and suitable examples

Question text is extracted from the official AKTU question paper PDF above. Hindi translations are omitted — every question is printed in English in the original paper. Last verified: 2026-08-23.