B.TechSemester 72021-22Vlsi DesignKEC-072
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Vlsi Design (KEC-072) - AKTU Question Paper 2021-22

B.Tech · Semester 7 · Free PDF Download

This is the official AKTU Vlsi Design Previous Year Question Paper for B.Tech Semester 7, academic session 2021-22. Published by Dr. A.P.J. Abdul Kalam Technical University (AKTU/UPTU), Lucknow. Free PDF download — no login required.

Course:B.Tech
Semester:Semester 7
Session:2021-22
University:AKTU / UPTU

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Questions Asked in 2021-22

Vlsi Design (KEC-072) — extracted question text

Section AAttempt all q u e s t i o n s i n b r i e f . 2 x 10 = 20
  • a
    What is Photolithography? 2 1
  • b
    Why we need a low power VLSI circuits in today’s scenario? 2 1
  • c
    What is contamination delay? 2 2
  • d
    Define logical effect with example. 2 2
  • e
    Differentiate between static power and dynamic power. 2 3
  • f
    Implement 2:1 MUX using CMOS transmission gate. 2 3
  • g
    Describe different storage elements. 2 4
  • h
    Distinguish between SRAM and DRAM. 2 4 i. Explain the term controllability and observability. 2 5 j. What is meant by Stuck-at-1 fault and Stuck-at-0 fault? 2 5
Section BAttempt any three o f t h e f o l l o w i n g :
  • a
    Discuss the hierarchy of various semiconductors with Moore’s la w. Write short note on VLSI testing
  • b
    Explain Elmore delay model with suitable RC networks. Mention i ts merits
  • c
    Compare the performance of Domino CMOS logic and NP Domino CMOS logic with suitable example
  • d
    Explain read/ Write operation of SRAM memory cell. How 1 bit ce ll is used in bigger memory systems
  • e
    Explain the issues involved i n BIST techniques in details. 1 0 5
Section CAttempt any one p a r t o f t h e f o l l o w i n g :
  • a
    Draw the Y-chart and explain VL SI design process. Mention its advantages
  • b
    Explain the CMOS fabrication steps with neat diagram using n-we ll process
  • a
    Derive the expression for total power dissipation of a CMOS circuit. 10 2
  • b
    Draw and explain the working of RC delay model for interconnects. 10 2
  • a
    Draw and explain NORA and TSPC dynamic CMOS logic. 10 3
  • b
    What is pre-charge evaluate logic in dynamic CMOS logic and dra w the basic architecture of SRAM and DRAM
  • a
    Write short note on DRAM cell. Explain leakage and refresh oper ation in DRAM cells
  • b
    Explain the various types of power dissipation in CMOS circuits. 10 4
  • a
    Explain the parallel procession approach in low power CMOS circuits. 10 5
  • b
    Write a short note on i. Adiabatic logic circuits ii. Scan cell based approach

Question text is extracted from the official AKTU question paper PDF above. Check the original PDF for equations, diagrams and complete wording. Extracted: 2026-08-23.

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