Digital Electronics (BEE401) - AKTU Question Paper 2025-26
B.Tech · Semester 4 · Free PDF Download
This is the official AKTU Digital Electronics Previous Year Question Paper for B.Tech Semester 4, academic session 2025-26. Published by Dr. A.P.J. Abdul Kalam Technical University (AKTU/UPTU), Lucknow. Free PDF download — no login required.
Course:B.Tech
Semester:Semester 4
Session:2025-26
University:AKTU / UPTU
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Questions Asked in 2025-26
Digital Electronics (BEE401) — extracted question text · 70 marks · 3 Hours
Section AAttempt all questions in brief. 2x7 = 14
- aConvert the Octal number 245 into its decimal equivalent
- bIdentify the logic gate that models a circuit with two switches connected in series
- cExplain the working of a multiplexer with an example
- dIllustrate the function of a flip-flop and give examples of any two types
- eFor the design of a sequential circuit having nine states, Calculate the minimum number of memory elements required
- fExplain the basic function of an FPGA
- gDescribe offset error in a D/A converter
Section BAttempt any three of the following: 7 x 3 = 21
- aSimplify the Boolean expression using K-map: Implement using NAND gates only
- bConstruct a full subtractor circuit and explain its operation
- cExplain the working of JK flip-flop with truth table. Also draw its State Diagram
- dDetermine the most suitable logic family for a system requirement using given parameters such as power, speed, and noise immunity
- eA 4-bit R-2R ladder type D/A converter having resistor values of R=10kΩ and 2R=20kΩ, uses VR of 10V. Calculate (a) the resolution of the D/A converter, and (b) I0 for a digital input of 1101
Section CAttempt any one part of the following: 7 x 1 = 7
- aAnalyze the given Boolean expressions and derive their canonical forms
- 1𝐴𝐵+𝐵𝐶̅𝐷+𝐴̅𝐷 2. (𝐴+𝐵ത)(𝐶̅ +𝐷ഥ)(𝐵ത +𝐶̅)
- bExamine the relationship between binary inputs and Gray code outputs in a 4-bit Binary to Gray Code converter
- aImplement the logic function given below using a 74151 eight input data selector/MUX
- bApply the concept of cascading decoders to obtain outputs of a 5-to-32 decoder using two 4-to-16 decoders
- aExamine the state diagram and excitation table of a synchronous decade counter implemented using Toggle flip-flops
- bAnalyze the behavior of a finite state machine used for sequence detection and justify its state transitions
- aExplain the construction and working of a TTL NAND gate with circuit diagram. Discuss its input-output characteristics
- bDescribe the architecture and working of Programmable Logic Array (PLA)
- aExplain Flash Type ADC with relevant diagram. Discuss its applications
- bInterpret the operation of a 4-bit weighted resistor type D/A converter
Question text is extracted from the official AKTU question paper PDF above. Check the original PDF for equations, diagrams and complete wording. Extracted: 2026-08-23.
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